Phase-locked loops are master devices for providing clock circuits, and have existed in analog or digital versions for a long time. General issues for PLLs include the width of the frequency range of the outputted signal, the lock time and the phase stability.
Commonly, the frequency range is set either by selecting appropriately the voltage-controlled oscillator (VCO) which is used within the PLL, or by controlling a capacitance value for a capacitor tank that is implemented within the VCO module. Implementing digitally-controlled capacitor tanks for such PLL application is well-known. The frequency range is controlled by applying a code value to a digital input of the capacitor tank. Such frequency range control can be user-performed initially, before the PLL starts operating itself by tuning continuously an analog voltage which is applied to the VCO module so as to reduce a signal representative for the PLL error. PLLs which are provided with such range selection are commonly denoted multiband PLLs.
There also exist improved PLL devices, where the code value for selecting the frequency range is automatically produced by an additional circuit part. The range selection is performed automatically without operator intervention, once a frequency target value is supplied to the PLL device. This is very useful in particular in mobile phones, where one and the same PLL is used for clocking radio-signal transmissions each performed within separate transmission bands.
U.S. Patent Publication. No. 2011/260762 and U.S. Pat. No. 7,420,427 disclose such multiband PLL devices with automatic frequency range selection. But in these known implementations, an extra-circuit is added to the PLL for performing the frequency range selection. This extra-circuit increases the overall device complexity and cost. In addition, these PLL devices include a switch for moving from the operation of the extra circuit which performs the frequency range selection, to the usual analog PLL operation. The switching between both operations then generates a phase jump which may cause nuisances to the PLL application.
One object of the present invention is to provide a new PLL device with automatic frequency range selection, which does not have the preceding drawbacks.
Another object of the present invention is to provide a PLL device that automatically performs fast convergence toward the appropriate frequency range once a target frequency value is supplied to the PLL, with convergence time being as short as possible.
Still another object is that the convergence result matches precisely the target frequency value.
Still another object is that an initial frequency range can be preloaded easily, so that the automatic convergence toward the final frequency range is accelerated when compared to using a standard start frequency range which is set independently from the target frequency value.